
MAX5894
sources directly to the device without external resistors
to define the DC level. The input resistance of CLKP
and CLKN is 5k
.
A convenient way to apply a differential signal is with a
balun transformer as shown in Figure 15. Alternatively,
these inputs may be driven from a CMOS-compatible
clock source, however it is recommended to use
sine-wave or AC-coupled differential ECL/PECL drive for
best dynamic performance.
Output Interface (OUTI, OUTQ)
The MAX5894 outputs complementary currents (OUTIP,
OUTIN, OUTQP, and OUTQN) that can be utilized in a
differential configuration. Load resistors convert these
two output currents into a differential output voltage.
The differential output between OUTIP (OUTQP) and
OUTIN (OUTQN) can be converted to a single-ended
output using a transformer or a differential amplifier.
Figure 16 shows a typical transformer-based applica-
tion circuit for generation of IF output signals. In this
configuration, the MAX5894 operates in differential
mode, which reduces even-order harmonics, and
increases the available output power. Pay close atten-
tion to the transformer core saturation characteristics
when selecting a transformer. Transformer core satura-
tion can introduce strong second harmonic distortion,
especially at low output frequencies and high signal
amplitudes. It is recommended to connect the trans-
former center tap to ground.
14-Bit, 500Msps, Interpolating and Modulating
Dual DAC with CMOS Inputs
26
______________________________________________________________________________________
Figure 15. Single-Ended-to-Differential Clock Conversion Using
a Balun Transformer
SINGLE-ENDED
IINPUT
1:1 RATIO
MINI-CIRCUITS
ADTL1-12
24.9
24.9
CLKP
CLKN
100nF
MAX5894
Figure 16. Differential-to-Single-Ended Conversion Using Wideband RF Transformers
MAX5894
OUTQP
OUTQN
QDAC
14
1:1
50
100
50
VQOUT, SINGLE-ENDED
OUTIP
OUTIN
IDAC
14
1:1
50
100
50
VIOUT, SINGLE-ENDED